The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2022

Filed:

Jul. 15, 2020
Applicant:

Nexgen Power Systems, Inc., Santa Clara, CA (US);

Inventors:

Clifford Drowley, Santa Clara, CA (US);

Ray Milano, Santa Clara, CA (US);

Subhash Srinivas Pidaparthi, Santa Clara, CA (US);

Andrew P. Edwards, Santa Clara, CA (US);

Hao Cui, Santa Clara, CA (US);

Shahin Sharifzadeh, Santa Clara, CA (US);

Assignee:

NEXGEN POWER SYSTEMS, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7856 (2013.01); H01L 29/6653 (2013.01); H01L 29/66803 (2013.01); H01L 29/7783 (2013.01); H01L 29/7788 (2013.01);
Abstract

A transistor includes a substrate having a first surface and a second surface opposite the first surface, a drift region having a doped region on the first surface of the substrate and a graded doping region on the doped region, a semiconductor fin protruding from the graded doping region and comprising a metal compound layer at an upper portion of the semiconductor fin, a source metal contact on the metal compound layer, a gate layer having a bottom portion directly contacting the graded doping region; and a drain metal contact on the second surface of the substrate.


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