The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2022

Filed:

Dec. 28, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Prithwish Chatterjee, Tempe, AZ (US);

Junnan Zhao, Gilbert, AZ (US);

Sai Vadlamani, Chandler, AZ (US);

Ying Wang, Chandler, AZ (US);

Rahul Jain, Chandler, AZ (US);

Andrew J. Brown, Chandler, AZ (US);

Lauren A. Link, Chandler, AZ (US);

Cheng Xu, Chandler, AZ (US);

Sheng C. Li, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/28 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01F 27/28 (2006.01); H01F 41/04 (2006.01); H01L 25/16 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01F 27/2804 (2013.01); H01F 41/041 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49866 (2013.01); H01L 25/16 (2013.01); H01F 2027/2809 (2013.01); H01L 24/16 (2013.01); H01L 2224/16235 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19102 (2013.01);
Abstract

Methods/structures of forming in-package inductor structures are described. Embodiments include a substrate including a dielectric material, the substrate having a first side and a second side. A conductive trace is located within the dielectric material. A first layer is on a first side of the conductive trace, wherein the first layer comprises an electroplated magnetic material, and wherein a sidewall of the first layer is adjacent the dielectric material. A second layer is on a second side of the conductive trace, wherein the second layer comprises the electroplated magnetic material, and wherein a sidewall of the second layer is adjacent the dielectric material.


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