The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 03, 2022
Filed:
Jun. 25, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 9/00 (2006.01); H01L 23/498 (2006.01); H05K 3/34 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 21/4853 (2013.01); H01L 23/49861 (2013.01); H05K 3/3426 (2013.01);
Abstract
Disclosed embodiments include folded, top-to-bottom interconnects that couple a die side of an integrated-circuit package substrate, to a board as a complement to a ball-grid array for a flip-chip-mounted integrated-circuit die on the die side. The folded, top-to-bottom interconnect is in a molded frame that forms a perimeter around an infield to receive at least one flip-chip IC die. Power, ground and I/O interconnections shunt around the package substrate, and such shunting includes voltage regulation that need not be routed through the package substrate.