The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2022

Filed:

Dec. 05, 2018
Applicant:

Sj Semiconductor(jiangyin) Corporation, Jiangyin, CN;

Inventors:

Yenheng Chen, Jiangyin, CN;

Chengchung Lin, Jiangyin, CN;

Chengtar Wu, Jiangyin, CN;

Jangshen Lin, Jiangyin, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/22 (2006.01); H01Q 1/38 (2006.01); H01L 23/49 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01Q 1/2283 (2013.01); H01L 23/3114 (2013.01); H01L 23/3121 (2013.01); H01L 23/49 (2013.01); H01Q 1/38 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81005 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/3511 (2013.01);
Abstract

The present disclosure provides a semiconductor packaging structure having an antenna module, comprising: a substrate having a first surface and a second surface opposite to the first surface; a redistribution layer located on the first surface; a metal bump electrically connected with the redistribution layer; a semiconductor chip electrically connected with the redistribution layer; a plastic packaging material layer packaging the metal bump and the semiconductor chip; and an antenna module located on the second surface.


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