The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2022
Filed:
Feb. 06, 2020
Silicon Storage Technology, Inc., San Jose, CA (US);
Hsuan Liang, Zhudong Township, Hsinchu County, TW;
Man Tang Wu, Xinpu Township, Hsinchu County, TW;
Jeng-Wei Yang, Zhubei, TW;
Hieu Van Tran, San Jose, CA (US);
Lihsin Chang, Hsinchu County, TW;
Nhan Do, Saratoga, CA (US);
Silicon Storage Technology, Inc., San Jose, CA (US);
Abstract
A memory cell array with memory cells arranged in rows and columns, first sub source lines each connecting together the source regions in one of the rows and in a first plurality of the columns, second sub source lines each connecting together the source regions in one of the rows and in a second plurality of the columns, a first and second erase gate lines each connecting together all of the erase gates in the first and second plurality of the columns respectively, first select transistors each connected between one of first sub source lines and one of a plurality of source lines, second select transistors each connected between one of second sub source lines and one of the source lines, first select transistor line connected to gates of the first select transistors, and a second select transistor line connected to gates of the second select transistors.