The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Dec. 11, 2018
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Chi-Wen Pan, Hsin-Chu, TW;

I-Hsuan Peng, Hsin-Chu, TW;

Sheng-Liang Kuo, Hsin-Chu, TW;

Yi-Jou Lin, Hsin-Chu, TW;

Tai-Yu Chen, Hsin-Chu, TW;

Assignee:

MediaTek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/16 (2006.01); H01L 23/367 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 25/10 (2006.01); H01L 25/03 (2006.01); H01L 23/04 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/16 (2013.01); H01L 23/04 (2013.01); H01L 23/3672 (2013.01); H01L 23/562 (2013.01); H01L 25/03 (2013.01); H01L 25/0655 (2013.01); H01L 25/10 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 23/367 (2013.01); H01L 23/49816 (2013.01); H01L 23/5384 (2013.01); H01L 24/16 (2013.01); H01L 24/20 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/92225 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/157 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/18162 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.


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