The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2022

Filed:

Dec. 04, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Gyujin Choi, Suwon-si, KR;

Sunghoan Kim, Suwon-si, KR;

Changeun Joo, Suwon-si, KR;

Chilwoo Kwon, Suwon-si, KR;

Youngkyu Lim, Suwon-si, KR;

Sunguk Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/66 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/564 (2013.01); H01L 21/4853 (2013.01); H01L 21/565 (2013.01); H01L 22/12 (2013.01); H01L 23/3128 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 24/02 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 2224/0236 (2013.01); H01L 2224/02311 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/037 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/214 (2013.01);
Abstract

The method of manufacturing a connection structure of a semiconductor chip includes: preparing a semiconductor chip having a first surface having a connection pad disposed thereon and a second surface opposing the first surface and including a passivation layer disposed on the first surface and covering the connection pad; forming an insulating layer on the first surface of the semiconductor chip, the insulating layer covering at least a portion of the passivation layer; forming a via hole penetrating through the insulating layer to expose at least a portion of the passivation layer; exposing at least a portion of the connection pad by removing the passivation layer exposed by the via hole; forming a redistribution via by filling the via hole with a conductive material; and forming a redistribution layer on the redistribution via and the insulating layer.


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