The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2022

Filed:

Dec. 20, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Chao Mao, Zhongli, TW;

Chin-Chuan Chang, Zhudong Township, Hsinchu County, TW;

Szu-Wei Lu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/00 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/76816 (2013.01); H01L 24/08 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 2224/02333 (2013.01); H01L 2224/83203 (2013.01);
Abstract

A structure and a formation method of a package structure are provided. The method includes disposing a first semiconductor die over a carrier substrate and forming a first protective layer to surround the first semiconductor die. The method also includes forming a dielectric layer over the first protective layer and the first semiconductor die. The method further includes patterning the dielectric layer to form an opening partially exposing the first semiconductor die and the first protective layer. In addition, the method includes bonding a second semiconductor die to the first semiconductor die after the opening is formed. The method includes forming a second protective layer to surround the second semiconductor die.


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