The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2022

Filed:

Apr. 07, 2020
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Yu-De Lin, Taoyuan, TW;

Heng-Yuan Lee, Hsinchu County, TW;

Po-Chun Yeh, Taichung, TW;

Chih-Yao Wang, Taichung, TW;

Hsin-Yun Yang, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 49/02 (2006.01); H01L 27/11502 (2017.01); H01L 27/11507 (2017.01); G11C 11/22 (2006.01);
U.S. Cl.
CPC ...
H01L 28/90 (2013.01); H01L 27/11502 (2013.01); H01L 28/75 (2013.01); G11C 11/22 (2013.01); G11C 11/221 (2013.01); H01L 27/11507 (2013.01); H01L 28/56 (2013.01);
Abstract

A ferroelectric memory is provided. The ferroelectric memory includes a substrate, a first conductive layer disposed on the substrate, a patterned oxide layer disposed on the first conductive layer and the substrate, exposing a part of the first conductive layer, a second conductive layer disposed on the exposed first conductive layer and the patterned oxide layer, an antiferroelectric layer disposed on the exposed first conductive layer and the second conductive layer, a ferroelectric layer disposed on the second conductive layer and located on the antiferroelectric layer, a conductive oxide layer disposed between the antiferroelectric layer, and a third conductive layer disposed on the conductive oxide layer and between the ferroelectric layer.


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