The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2021

Filed:

Oct. 22, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Hsuan Hsiao, Taipei, TW;

Shu-Yuan Ku, Zhubei, TW;

Chih-Chang Hung, Hsinchu, TW;

I-Wei Yang, Yilan County, TW;

Chih-Ming Sun, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/417 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 29/0649 (2013.01); H01L 29/41791 (2013.01); H01L 29/66795 (2013.01); H01L 29/7855 (2013.01); H01L 21/845 (2013.01); H01L 27/1211 (2013.01); H01L 29/7843 (2013.01);
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a first metal gate stack and a second metal gate stack over a semiconductor substrate. The semiconductor device structure also includes a dielectric layer surrounding the first metal gate stack and the second metal gate stack. The semiconductor device structure further includes an insulating structure between the first metal gate stack and the second metal gate stack. The insulating structure has a first convex surface facing towards the first metal gate stack.


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