The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2021
Filed:
Oct. 09, 2019
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Yung-Chen Chiu, Taichung, TW;
Sheng-Yuan Hsueh, Tainan, TW;
Kuo-Hsing Lee, Hsinchu County, TW;
Chien-Liang Wu, Pingtung County, TW;
Chih-Kai Kang, Tainan, TW;
Guan-Kai Huang, Tainan, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 27/06 (2006.01); H01L 27/085 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0694 (2013.01); H01L 27/085 (2013.01); H01L 29/66462 (2013.01); H01L 29/7787 (2013.01);
Abstract
A 3D semiconductor structure includes a buffer layer, a n-type high electron mobility transistor (HEMT) disposed on a first surface of the buffer layer, and a p-type high hole mobility transistor (HHMT) disposed on a second surface of the buffer layer opposite to the first surface.
Quick Actions:
Chiu, Yung-Chen. (2021). 3d semiconductor structure and method of fabricating the same (U.S. Patent No. 11195831). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11195831
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