The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2021
Filed:
Apr. 17, 2020
Method for forming semiconductor device that includes covering metal gate with multilayer dielectric
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A method includes forming a dummy gate structure over a substrate; forming a plurality of gate spacers on opposite sidewalls of the dummy gate structure; forming an interlayer dielectric (ILD) layer surrounding the gate spacers; replacing the dummy gate structure with a metal gate structure; etching back the metal gate structure to form a gate trench between the gate spacers; depositing a first dielectric layer in the gate trench, in which the first dielectric layer has horizontal portions over the metal gate structure and the ILD layer, and vertical portions on sidewalls of the gate spacers; etching the vertical portions of the first dielectric layer until the sidewalls of the gate spacers exposed; and performing depositing the first dielectric layer and etching the vertical portions of the first dielectric layer in an alternate manner.