The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2021

Filed:

May. 28, 2020
Applicant:

Utac Headquarters Pte. Ltd., Singapore, SG;

Inventors:

Hua Hong Tan, Singapore, SG;

Wilson Poh Leng Ong, Singapore, SG;

Kriangsak Sae Le, Bangkok, TH;

Saravuth Sirinorakul, Bangkok, TH;

Somsak Phukronghin, Bangkok, TH;

Paweena Phatto, Bangkok, TH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/16 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 21/52 (2006.01); H01L 21/56 (2006.01); H01L 23/055 (2006.01); H01L 23/04 (2006.01); H01L 23/24 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4807 (2013.01); H01L 21/4857 (2013.01); H01L 21/52 (2013.01); H01L 21/56 (2013.01); H01L 23/04 (2013.01); H01L 23/055 (2013.01); H01L 23/16 (2013.01); H01L 23/24 (2013.01); H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/45155 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/10161 (2013.01); H01L 2924/15174 (2013.01); H01L 2924/15786 (2013.01); H01L 2924/16151 (2013.01); H01L 2924/16195 (2013.01); H01L 2924/181 (2013.01);
Abstract

A method for forming a semiconductor package is disclosed herein. The method includes forming a package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate includes a recess region below the first major surface defined with a die region and a non-die region surrounding the die region. A semiconductor die is disposed in the die region within the recess region. A dam structure is disposed within the recess region. The dam structure surrounds the semiconductor die and extends upwardly to a height below the first major surface of the package substrate. The method also includes dispensing a liquid encapsulant material into the recess region. The liquid encapsulant material is surrounded by the dam structure and extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.


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