The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2021
Filed:
Oct. 17, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chun-Ti Lu, Hsinchu, TW;
Hao-Yi Tsai, Hsinchu, TW;
Ming-Hung Tseng, Miaoli County, TW;
Tsung-Hsien Chiang, Hsinchu, TW;
Yen-Liang Lin, Taichung, TW;
Tzu-Sung Huang, Tainan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A semiconductor package and a manufacturing method for the semiconductor package are provided. The package comprises a die, through interlayer vias (TIVs), a dielectric film, a backside film and solder paste portions. The TIVs are disposed beside the semiconductor die and a molding compound laterally surrounds the die and the TIVs. The dielectric film is disposed on a backside of the semiconductor die, and the backside film is disposed on the dielectric film. The backside film has at least one of a coefficient of thermal expansion (CTE) and a Young's modulus larger than that of the dielectric film. The solder paste portions are disposed on the TIVs and located within openings penetrating through the dielectric film and the backside film. There is a recess located at an interface between the dielectric film and the backside film within the opening.