The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2021
Filed:
Dec. 16, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Yu-Ling Hsu, Tainan, TW;
Hung-Ling Shih, Tainan, TW;
Chieh-Fei Chiu, Tainan, TW;
Po-Wei Liu, Tainan, TW;
Wen-Tuo Huang, Tainan, TW;
Yong-Shiuan Tsair, Tainan, TW;
Shihkuang Yang, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A method of manufacturing a non-volatile memory semiconductor device includes forming a plurality of memory cells on a non-volatile memory cell area of a semiconductor substrate, and forming a conductive layer over the plurality of memory cells. A first planarization layer of a planarization material having a viscosity of less than about 1.2 centipoise is formed over the plurality of memory cells. A planarization operation is performed on the first planarization layer and the conductive layer, thereby removing an upper region of the first planarization layer and an upper region of the conductive layer. Portions of a lower region of the conductive layer are completely removed between the memory cells.