The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2021
Filed:
Jan. 16, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Yu-Ling Hsu, Tainan, TW;
Ping-Cheng Li, Kaohsiung, TW;
Hung-Ling Shih, Tainan, TW;
Po-Wei Liu, Tainan, TW;
Wen-Tuo Huang, Tainan, TW;
Yong-Shiuan Tsair, Tainan, TW;
Chia-Sheng Lin, Hsinchu, TW;
Shih Kuang Yang, Tainan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.