The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2021

Filed:

Aug. 22, 2019
Applicants:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

National Taiwan University, Taipei, TW;

Inventors:

Shih-Yen Lin, Tainan, TW;

Kuan-Chao Chen, Tainan, TW;

Hsuan-An Chen, Chiayi, TW;

Lun-Ming Lee, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/24 (2006.01); H01L 21/283 (2006.01); H01L 29/768 (2006.01); H01L 29/66 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0665 (2013.01); H01L 21/283 (2013.01); H01L 29/24 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); H01L 29/768 (2013.01);
Abstract

A semiconductor device includes a substrate, semiconductor 2-D material layer, a conductive 2-D material layer, a gate dielectric layer, and a gate electrode. The semiconductor 2-D material layer is over the substrate. The conductive 2-D material layer extends along a source/drain region of the semiconductor 2-D material layer, in which the conductive 2-D material layer comprises a group-IV element. The gate dielectric layer extends along a channel region of the semiconductor 2-D material layer. The gate electrode is over the gate dielectric layer.


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