The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Dec. 21, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Chen-Guan Lee, Portland, OR (US);

Joodong Park, Portland, OR (US);

En-Shao Liu, Portland, OR (US);

Everett S. Cassidy-Comfort, Beaverton, OR (US);

Walid M. Hafez, Portland, OR (US);

Chia-Hong Jan, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 21/764 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4991 (2013.01); H01L 21/764 (2013.01); H01L 21/7682 (2013.01); H01L 21/76897 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01);
Abstract

A microelectronic transistor may be fabricated having an airgap spacer formed as a gate sidewall spacer, such that the airgap spacer is positioned between a gate electrode and a source contact and/or a drain contact of the microelectronic transistor. As the dielectric constant of gaseous substances is significantly lower than that of a solid or a semi-solid dielectric material, the airgap spacer may result in minimal capacitive coupling between the gate electrode and the source contact and/or the drain contact, which may reduce circuit delay of the microelectronic transistor.


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