The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Jul. 28, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Che-Hao Chang, Hsinchu, TW;

Cheng-Hao Hou, Hsinchu, TW;

Kuei-Lun Lin, Keelung, TW;

Kun-Yu Lee, Tainan, TW;

Xiong-Fei Yu, Hsinchu, TW;

Chi-On Chui, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 29/51 (2006.01); H01L 29/49 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 29/401 (2013.01); H01L 21/02178 (2013.01); H01L 29/408 (2013.01); H01L 29/513 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/02205 (2013.01); H01L 21/28088 (2013.01); H01L 21/28194 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01);
Abstract

Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate structure over the substrate. The gate structure includes a high-k layer over the substrate, a shielding layer over the high-k layer, and an N-type work function metal layer over the shielding layer. In some embodiments, the shielding layer has a dielectric constant less than a dielectric constant of the high-k layer.


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