The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2021
Filed:
Jun. 25, 2019
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Wee Hoe, Bayan Lepas, MY;
Chan Kim Lee, Bayan Lepas, MY;
Chee Chun Yee, Bayan Lepas, MY;
Mooi Ling Chang, Bayan Baru, MY;
Siang Yeong Tan, Bayan Lepas, MY;
Say Thong Tony Tan, Island Park, MY;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/16 (2006.01); H05K 1/18 (2006.01); H01L 25/16 (2006.01); H01Q 1/22 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); G06F 1/16 (2013.01); H01L 25/16 (2013.01); H01Q 1/2258 (2013.01); H01L 23/5384 (2013.01); H05K 2201/10098 (2013.01); H05K 2201/10128 (2013.01); H05K 2201/10159 (2013.01);
Abstract
A semiconductor device and associated methods are disclosed. In one example, a processor die is coupled to a first side of a package substrate, and a memory die coupled to a second side of the package substrate. A system accelerator die is further coupled to the package substrate. In selected examples, the system accelerator die provides performance improvements, such as higher cached memory speed and/or higher memory bandwidth.