The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 2021
Filed:
May. 10, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Harry-Hak-Lay Chuang, Zhubei, TW;
Chen-Pin Hsu, Taoyuan, TW;
Hung Cho Wang, Taipei, TW;
Wen-Chun You, Dongshan Township, TW;
Sheng-Chang Chen, Hsinchu, TW;
Tsun Chung Tu, Tainan, TW;
Jiunyu Tsai, Hsinchu, TW;
Sheng-Huang Huang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
Some embodiments relate to a method for manufacturing a memory device. The method includes forming a first masking layer disposed over a dielectric layer, the first masking layer exhibiting sidewalls defining an opening disposed above a magnetoresistive random-access memory (MRAM) cell located in an embedded memory region. A first etch is performed to form a first via opening within the dielectric layer above the MRAM cell. A top electrode via layer formed over the MRAM cell and the dielectric layer. A first planarization process performed on the top electrode via layer to remove part of the top electrode via layer and define a top electrode via having a substantially flat top surface.