The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Feb. 07, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Ying-Chih Hsu, Hsinchu, TW;

Alan Roth, Leander, TX (US);

Chuei-Tang Wang, Taichung, TW;

Chih-Yuan Chang, Hsinchu, TW;

Eric Soenen, Austin, TX (US);

Chih-Lin Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3677 (2013.01); H01L 21/486 (2013.01); H01L 23/481 (2013.01); H01L 23/49822 (2013.01); H01L 23/5389 (2013.01); H01L 2224/18 (2013.01);
Abstract

A method of transferring heat in a package includes conducting heat from a first device to a second device by a low thermal resistance substrate path in a chip layer of the package, conducting heat from an integrated circuit (IC) to a first package layer of the package, conducting heat from the first package layer of the package to at least a first set of through-vias positioned in the chip layer, and conducting heat from the first set of through-vias to a surface of a second package layer opposite the chip layer. The first device and the second device is part of the IC chip. The first package layer is adjacent to the chip layer.


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