The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2021
Filed:
Jun. 28, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Jui-Yen Lin, Hillsboro, OR (US);
Chen-Guan Lee, Hillsboro, OR (US);
Joodong Park, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Kun-Huan Shih, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 21/28 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66659 (2013.01); H01L 21/26586 (2013.01); H01L 21/2815 (2013.01); H01L 21/823425 (2013.01); H01L 21/823468 (2013.01); H01L 27/088 (2013.01); H01L 29/66 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01);
Abstract
An embodiment includes an apparatus comprising: a transistor including a source, a drain, and a gate that has first and second sidewalls; a first spacer on the first sidewall between the drain and the gate; a second spacer on the second sidewall between the source and the gate; and a third spacer on the first spacer. Other embodiments are described herein.