The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Mar. 27, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Xin Miao, Slingerlands, NY (US);

Richard A. Conti, Altamont, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Kangguo Cheng, Schenectady, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 21/285 (2006.01); H01L 29/66 (2006.01); H01L 29/45 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2436 (2013.01); H01L 21/28518 (2013.01); H01L 27/2463 (2013.01); H01L 29/45 (2013.01); H01L 29/66515 (2013.01); H01L 45/1608 (2013.01); H01L 21/76897 (2013.01); H01L 29/665 (2013.01); H01L 29/66545 (2013.01); H01L 29/66575 (2013.01);
Abstract

A middle-of-line (MOL) structure is provided and includes device and resistive memory (RM) regions. The device region includes trench silicide (TS) metallization, a first interlayer dielectric (ILD) portion and a first dielectric cap portion disposed over the TS metallization and the first ILD portion. The RM region includes a second dielectric cap portion, a second ILD portion and an RM resistor interposed between the second dielectric cap portion and the second ILD portion.


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