The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2021
Filed:
Jan. 08, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Chong J. Zhao, West Linn, OR (US);
James A. McCall, Portland, OR (US);
Shigeki Tomishima, Portland, OR (US);
George Vergis, Portland, OR (US);
Kuljit S. Bains, Olympia, WA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/02 (2006.01); G11C 11/4093 (2006.01); G11C 11/4096 (2006.01); G11C 11/408 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4093 (2013.01); G11C 11/408 (2013.01); G11C 11/4096 (2013.01); H01L 27/108 (2013.01);
Abstract
Techniques to couple a high bandwidth memory device on a silicon substrate and a package substrate are disclosed. Examples include selectively activating input/out (I/O) or command and address (CA) contacts on a bottom side of a logic layer for the high bandwidth device based on a mode of operation. The I/O and CA contacts are for accessing one or more memory devices include in the high bandwidth memory device via one or more data channels.