The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Sep. 30, 2020
Applicants:

Global Unichip Corporation, Hsinchu, TW;

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Igor Elkanovich, Hsinchu, TW;

Amnon Parnass, Hsinchu, TW;

Pei Yu, Hsinchu, TW;

Li-Ken Yeh, Hsinchu, TW;

Yung-Sheng Fang, Hsinchu, TW;

Sheng-Wei Lin, Hsinchu, TW;

Tze-Chiang Huang, Hsinchu, TW;

King Ho Tam, Hsinchu, TW;

Ching-Fang Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 3/037 (2006.01); H01L 23/48 (2006.01); H01L 23/538 (2006.01); H03K 3/3562 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0372 (2013.01); H01L 23/481 (2013.01); H01L 23/5383 (2013.01); H03K 19/017509 (2013.01); H03K 3/35625 (2013.01);
Abstract

An interface device and an interface method for interfacing between a master device and a slave device is provided. The master device generates command and the slave device generates data according to the command. The interface device includes a master interface and a slave interface. The master interface is coupled to the master device and configured to send the command to the slave device and/or receive the data from the slave device. The slave interface is coupled to the slave device and configured to receive the command from the master device and/or send the data to the master device. The master interface and the slave interface are driven by a clock generated by a clock generator. The master interface and the slave interface are electrically connected by one or plurality of bonds and/or TSVs.


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