The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Jun. 09, 2020
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Martin Poelzl, Ossiach, AT;

Robert Haase, San Pedro, CA (US);

Maximilian Roesch, St. Magdalen, AT;

Sylvain Leomant, Poertschach am Woerthersee, AT;

Andreas Meiser, Sauerlach, DE;

Bernhard Goller, Villach, AT;

Ravi Keshav Joshi, Klagenfurt, AT;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/225 (2006.01); H01L 27/06 (2006.01); H01L 29/10 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/02532 (2013.01); H01L 21/02584 (2013.01); H01L 21/2253 (2013.01); H01L 27/0629 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/41741 (2013.01); H01L 29/66553 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7813 (2013.01); H01L 29/7391 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes: forming one or more device epitaxial layers over a main surface of a doped Si base substrate; forming a diffusion barrier structure including alternating layers of Si and oxygen-doped Si in an upper part of the doped Si base substrate adjacent the main surface of the doped Si base substrate, in a lower part of the one or more device epitaxial layers adjacent the main surface of the doped Si base substrate, or in one or more additional epitaxial layers disposed between the main surface of the doped Si base substrate and the one or more device epitaxial layers; and forming a gate above the diffusion barrier structure.


Find Patent Forward Citations

Loading…