The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Nov. 06, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Kuan-Jung Chen, Hsin-Chu, TW;

Cheng-Hung Wang, Hsin-Chu, TW;

Tsung-Lin Lee, Hsin-Chu, TW;

Shiuan-Jeng Lin, Hsinchu, TW;

Chun-Ming Lin, Hsin-Chu, TW;

Wen-Chih Chiang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/532 (2006.01); H01L 23/58 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/31116 (2013.01); H01L 21/76283 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/528 (2013.01); H01L 23/53257 (2013.01); H01L 23/53271 (2013.01); H01L 23/585 (2013.01); H01L 29/0649 (2013.01);
Abstract

Structures and methods for reducing process charging damages are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a polysilicon region and an etch stop layer. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, and a buried layer arranged over the insulation layer. The polysilicon region extends downward from an upper surface of the buried layer and terminates in the handle layer. The etch stop layer is located on the substrate. The etch stop layer is in contact with both the substrate and the polysilicon region.


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