The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2021
Filed:
Mar. 13, 2019
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Ruilong Xie, Niskayuna, NY (US);
Hari Prasad Amanapu, Guilderland, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Chanro Park, Clifton Park, NY (US);
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/45 (2006.01); H01L 29/40 (2006.01); H01L 21/3105 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/456 (2013.01); H01L 21/31053 (2013.01); H01L 29/401 (2013.01); H01L 29/41791 (2013.01); H01L 29/42364 (2013.01); H01L 29/785 (2013.01);
Abstract
Techniques regarding non-SAC semiconductor devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can further comprise a gate positioned adjacent a channel region of a semiconductor body for a field effect transistor. The gate can comprise a metal liner, and wherein the metal liner is an interface between a first metal layer of the gate and a second metal layer of the gate.