The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Jun. 09, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hung-Chin Chung, Pingzhen, TW;

Shiang-Rung Tsai, Hsinchu, TW;

Hsien-Ming Lee, DatsuenShiang, TW;

Cheng-Lung Hung, Hsinchu, TW;

Hsiao-Kuan Wei, Longtan Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/40 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4966 (2013.01); H01L 21/28079 (2013.01); H01L 21/28088 (2013.01); H01L 29/401 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01);
Abstract

Methods for forming semiconductor structures are disclosed herein. An exemplary method includes forming a gate structure having a dummy gate stack over a substrate, performing a gate replacement process, such that the dummy gate stack is replaced with a metal gate stack, and forming a non-silane based oxide capping layer over the gate structure. The gate replacement process includes removing a portion of the dummy gate stack from the gate structure, thereby forming a gate trench. A work function layer is formed in the gate trench, a blocking layer is formed in the gate trench over the work function layer, and a metal layer (including, for example, aluminum) is formed in the gate trench over the blocking layer. The blocking layer includes titanium and nitrogen with a titanium to nitrogen ratio that is greater than one. In some implementations, the work function layer is formed over a dielectric layer.


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