The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2021
Filed:
Mar. 27, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Martin D. Giles, Portland, OR (US);
Tahir Ghani, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/12 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 27/092 (2006.01); H01L 29/165 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 21/02532 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01); H01L 29/165 (2013.01); H01L 29/42392 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract
Embodiments of the present disclosure relate to non-planar semiconductor device structures having fins. In one embodiment, a semiconductor device includes a substrate, silicon fins positioned on the substrate, and a germanium layer that is epitaxially grown on an upper region of the silicon fins with the silicon fins and the germanium layer forming a body of the semiconductor device.