The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

May. 30, 2019
Applicant:

Nepes Co., Ltd., Chungcheongbuk-do, KR;

Inventors:

Yong Tae Kwon, Chungcheongbuk-do, KR;

Hee Cheol Kim, Chungcheongnam-do, KR;

Seung Jun Moon, Gyeonggi-do, KR;

Jini Shim, Gyeonggi-do, KR;

Assignee:

NEPES CO., LTD., Chungcheongbuk-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/16 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 2224/0218 (2013.01); H01L 2224/0233 (2013.01); H01L 2224/02181 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/10122 (2013.01); H01L 2224/13005 (2013.01); H01L 2224/1601 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/3512 (2013.01);
Abstract

The present invention relates to a semiconductor package and a method of manufacturing the same. In a semiconductor package which electrically connects a semiconductor chip and a printed circuit board using a solder ball, the semiconductor package further includes a thermal buffer layer which is positioned on a semiconductor chip, absorbs and disperse heat generated by the semiconductor chip, increases a distance between the semiconductor chip and a printed circuit board to decrease a deviation of a heat conduction process, and has a thickness ranging from 7.5 to 50% of a diameter of a solder ball.


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