The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2021
Filed:
Feb. 05, 2020
Intel Corporation, Santa Clara, CA (US);
Abhishek R. Appu, El Dorado Hills, CA (US);
Altug Koker, El Dorado Hills, CA (US);
Eric J. Hoekstra, Latrobe, CA (US);
Kiran C. Veernapu, Bangalore, IN;
Prasoonkumar Surti, Folsom, CA (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
Kamal Sinha, Rancho Cordova, CA (US);
Balaji Vembu, Folsom, CA (US);
Eric J. Asperheim, El Dorado Hills, CA (US);
Sanjeev S. Jahagirdar, Folsom, CA (US);
Joydeep Ray, Folsom, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive data for a current write operation to a memory, determine a number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory and in response to a determination that the number of bits in the received data for the current write operation to the memory which have changed from a previous write operation to the memory exceeds a threshold, to toggle a plurality of bits in the data for the current write operation to create an encoded data set and set an indicator bit to a value which indicates that the plurality of bits have been toggled. Other embodiments are also disclosed and claimed.