The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Apr. 29, 2019
Applicant:

Wuhan Xinxin Semiconductor Manufacturing Co., Ltd., Hubei, CN;

Inventors:

Xing Hu, Hubei, CN;

Yu Zhou, Hubei, CN;

Tianjian Liu, Hubei, CN;

Sheng Hu, Hubei, CN;

Changlin Zhao, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/31116 (2013.01); H01L 21/76898 (2013.01); H01L 23/5329 (2013.01); H01L 23/53228 (2013.01); H01L 24/32 (2013.01); H01L 2224/32145 (2013.01);
Abstract

A semiconductor device and a manufacturing method thereof are disclosed. In the device, the isolation layer is used to prevent the first metal layer and the second metal layer which are over-etched and back-splashed from diffusing to a first substrate; and the isolation layer serves as a barrier layer to prevent an interconnection layer from diffusing into the first substrate. Further, the isolation layer includes a silicon nitride layer, which is advantageous for preventing the metal layers from back-splashing and diffusing to the sidewall of the first substrate. The isolation layer further includes a first silicon oxide layer and a second silicon oxide layer, wherein the second silicon oxide layer is used to protect the silicon nitride layer from being etched and consumed and the first silicon oxide layer is used to improve the adhesion between the silicon nitride layer and the first substrate.


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