The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2021
Filed:
Mar. 16, 2020
Intel Corporation, Santa Clara, CA (US);
Mark T. Bohr, Aloha, OR (US);
Tahir Ghani, Portland, OR (US);
Nadia M. Rahhal-Orabi, Lake Oswego, OR (US);
Subhash M. Joshi, Hillsboro, OR (US);
Joseph M. Steigerwald, Forest Grove, OR (US);
Jason W. Klaus, Portland, OR (US);
Jack Hwang, Portland, OR (US);
Ryan Mackiewicz, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.