The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2021

Filed:

Mar. 12, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Norbert Pielmeier, Regensburg, DE;

Chin Yung Lai, Melaka, MY;

Swee Kah Lee, Melaka, MY;

Muhammad Muhammat Sanusi, Sungai Petani, MY;

Evelyn Napetschnig, Diex, AT;

Nurfarena Othman, Melaka, MY;

Siew Ching Seah, Melaka, MY;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D 7/12 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); C25D 3/38 (2006.01);
U.S. Cl.
CPC ...
C25D 7/12 (2013.01); C25D 3/38 (2013.01); H01L 21/4828 (2013.01); H01L 23/49541 (2013.01); H01L 23/49582 (2013.01); H01L 23/49838 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/35 (2013.01); H01L 24/37 (2013.01); H01L 2224/11825 (2013.01); H01L 2224/11831 (2013.01); H01L 2224/13011 (2013.01); H01L 2224/13019 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/27825 (2013.01); H01L 2224/27831 (2013.01); H01L 2224/29011 (2013.01); H01L 2224/29019 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/35125 (2013.01); H01L 2224/37011 (2013.01);
Abstract

A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 μm to 10 μm. A method of manufacturing a metal surface with such micropores also is described.


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