The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Oct. 18, 2019
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Wei Hu, Miaoli County, TW;

Teng-Hao Yeh, Hsinchu County, TW;

Yu-Wei Jiang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 27/11565 (2017.01); H01L 27/11582 (2017.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02636 (2013.01); H01L 21/31111 (2013.01); H01L 27/11565 (2013.01); H01L 29/40117 (2019.08); H01L 29/513 (2013.01); H01L 29/518 (2013.01);
Abstract

A three-dimensional AND type flash memory and a manufacturing method thereof includes steps below is provided. A stack structure includes a first insulating layer and a first sacrificial layer is formed. A first pillar structure through the stack structure includes a second insulating layer and a second sacrificial layer surrounded by thereof is formed. A second pillar structure through the stack structure includes a channel layer and an insulating pillar surrounded by thereof is formed. The second sacrificial layer is located on both sides of the channel layer. The first sacrificial layer is removed. A lateral opening exposing a portion of the second insulating layer and the channel layer is formed. A gate insulating layer surrounding the exposed second insulating layer and channel layer is formed in the lateral opening. A gate layer is filled in the lateral opening. A conductive layer is used to replace the second sacrificial layer.


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