The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2021
Filed:
Jan. 28, 2016
Applicants:
Sanka Ganesan, Chandler, AZ (US);
Thorsten Meyer, Regensburg, DE;
Gerald Ofner, Regensburg, DE;
Intel Ip Corporation, Santa Clara, CA (US);
Inventors:
Assignee:
Intel IP Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 23/532 (2006.01); H01L 21/66 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53228 (2013.01); H01L 22/12 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 24/17 (2013.01); H01L 24/33 (2013.01); H01L 24/95 (2013.01); H01L 25/0655 (2013.01); H01L 2225/06513 (2013.01);
Abstract
Disclosed herein are integrated circuit (IC) packages, and related structures and techniques. In some embodiments, an IC package may include: a die; a redistribution structure, wherein the die is coupled to the redistribution structure via first-level interconnects and solder; a solder resist; and second-level interconnects coupled to the redistribution structure through openings in the solder resist.