The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Feb. 28, 2018
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Lan Peng, Leuven, BE;

Soon-Wook Kim, Heverlee, BE;

Eric Beyne, Heverlee, BE;

Gerald Peter Beyer, Heverlee, BE;

Erik Sleeckx, Steenokkerzeel, BE;

Robert Miller, Lubbeek, BE;

Assignee:

IMEC vzw, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/20 (2006.01); H01J 37/32 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 21/2007 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01J 37/321 (2013.01); H01J 37/32091 (2013.01); H01J 2237/334 (2013.01); H01L 2224/29082 (2013.01); H01L 2224/29187 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/83009 (2013.01); H01L 2224/83011 (2013.01); H01L 2224/83022 (2013.01); H01L 2224/83895 (2013.01); H01L 2224/83896 (2013.01); H01L 2224/83948 (2013.01); H01L 2224/83986 (2013.01); H01L 2924/04642 (2013.01); H01L 2924/059 (2013.01); H01L 2924/20106 (2013.01); H01L 2924/20107 (2013.01);
Abstract

The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient. The method additionally includes bonding the first and the second substrates by contacting the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate to form a substrate assembly. The method further includes post-bond annealing the assembly.


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