The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Sep. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Stephen Harvey Hall, Forest Grove, OR (US);

Bok Eng Cheah, Bukit Gambir, MY;

Chaitanya Sreerama, Hillsboro, OR (US);

Jackson Chung Peng Kong, Tanjung Tokong, MY;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/66 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/4857 (2013.01); H01L 23/49811 (2013.01); H01L 23/49866 (2013.01); H01L 23/66 (2013.01); H01L 23/498 (2013.01);
Abstract

A self-equalizing interconnect in a connector is installed in a microelectronic device. The self-equalizing interconnect is formed of a plurality of electrically conductive layers under conditions to offset skin-effect losses with respect to frequency change during operation. Each successive layer is configured to with the next highest electrical conductivity and subsequent electrically conductive films gradually decrease in electrical conductivity. In an embodiment, thickness of the conductive film adjacent the reference plain is configured thinnest and subsequent films are added and are seriatim gradually thicker. The highest electrically conductive film is configured closest to a reference plane in the connector, and the lowest electrically conductive film is farthest from the reference plane.


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