The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2020
Filed:
Jun. 20, 2019
Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;
Yoshihiro Matsushima, Shiga, JP;
Shigetoshi Sota, Kyoto, JP;
Eiji Yasuda, Osaka, JP;
Toshikazu Imai, Hyogo, JP;
Ryosuke Okawa, Nara, JP;
Kazuma Yoshida, Kyoto, JP;
Ryou Kato, Osaka, JP;
PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD., Kyoto, JP;
Abstract
A semiconductor device includes an N-type semiconductor substrate comprising silicon, an N-type low-concentration impurity layer that is in contact with the upper surface of the N-type semiconductor substrate, a metal layer that is in contact with the entire lower surface of the N-type semiconductor substrate and has a thickness of at least 20 μm, and first and second vertical MOS transistors formed in the low-concentration impurity layer. The ratio of the thickness of the metal layer to the thickness of a semiconductor layer containing the N-type semiconductor substrate and the low-concentration impurity layer is greater than 0.27. The semiconductor device further includes a support comprising a ceramic material and bonded to the entire lower surface of the metal layer only via a bonding layer.