The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2020

Filed:

Nov. 16, 2018
Applicant:

Atomera Incorporated, Los Gatos, CA (US);

Inventors:

Hideki Takeuchi, San Jose, CA (US);

Daniel Connelly, San Francisco, CA (US);

Marek Hytha, Brookline, MA (US);

Richard Burton, Phoenix, AZ (US);

Robert J. Mears, Wellesley, MA (US);

Assignee:

ATOMERA INCORPORATED, Los Gatos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 29/155 (2013.01); H01L 27/0886 (2013.01);
Abstract

A semiconductor device may include a semiconductor layer, spaced apart source and drain regions in the semiconductor layer with a channel region extending therebetween, and a gate on the channel region. The semiconductor device may further include a body contact in the semiconductor layer and comprising a body contact dopant diffusion blocking superlattice extending through the body contact to divide the body contact into a first body contact region and an second body contact region with the second body contact region having a same conductivity and higher dopant concentration than the first body contact region. The body contact dopant diffusion blocking superlattice may include a respective plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.


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