The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

May. 08, 2019
Applicants:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Toshiba Electronic Devices & Storage Corporation, Minato-ku, JP;

Inventors:

Tetsuya Ohno, Nomi, JP;

Hiroaki Katou, Nonoichi, JP;

Kenya Kobayashi, Nonoichi, JP;

Toshifumi Nishiguchi, Hakusan, JP;

Saya Shimomura, Komatsu, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7802 (2013.01); H01L 29/0865 (2013.01); H01L 29/1095 (2013.01); H01L 29/41741 (2013.01); H01L 29/41775 (2013.01); H01L 29/66712 (2013.01);
Abstract

According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region, second semiconductor regions, third semiconductor regions, a first conductive portion, a gate electrode, and a second electrode. The gate electrode includes a first electrode portion and a second electrode portion. The first electrode portion opposes a portion of the first semiconductor region, one of the second semiconductor regions, and one of the third semiconductors in a first direction perpendicular to a second direction. The second electrode portion is located between the first electrode portion and another one of the third semiconductor regions in the first direction. The second electrode portion opposes another portion of the first semiconductor region, another one of the second semiconductor regions, and the other one of the third semiconductor regions. A second insulating portion including a void is provided between the first electrode portion and the second electrode portion.


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