The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2020

Filed:

Nov. 12, 2018
Applicants:

United Microelectronics Corp., Hsin-Chu, TW;

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, CN;

Inventors:

Feng-Yi Chang, Tainan, TW;

Shih-Fang Tzou, Tainan, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Fu-Che Lee, Taichung, TW;

Ming-Feng Kuo, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01); H01L 23/528 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 21/76224 (2013.01); H01L 27/10888 (2013.01); H01L 29/0649 (2013.01); H01L 27/10894 (2013.01);
Abstract

The present invention provides a method of forming a semiconductor device. First, a substrate is provided and an STI is forming in the substrate to define a plurality of active regions. Then a first etching process is performed to form a bit line contact opening, which is corresponding to one of the active regions. A second etching process is performed to remove a part of the active region and its adjacent STI so a top surface of active region is higher than a top surface of the STI. Next, a bit line contact is formed in the opening. The present invention further provides a semiconductor structure.


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