The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2020

Filed:

Jul. 17, 2017
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Bruce M. Green, Gilbert, AZ (US);

Darrell G. Hill, Chandler, AZ (US);

Karen E. Moore, Phoenix, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/311 (2006.01); H01L 21/285 (2006.01); H01L 29/20 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/40 (2006.01); H01L 29/205 (2006.01); H01L 29/06 (2006.01); H01L 23/31 (2006.01); H01L 29/812 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/778 (2013.01); H01L 21/28575 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 23/3171 (2013.01); H01L 29/0615 (2013.01); H01L 29/1029 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/402 (2013.01); H01L 29/66462 (2013.01); H01L 29/7787 (2013.01); H01L 29/517 (2013.01); H01L 29/812 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer disposed between the first dielectric layer and a surface of the semiconductor substrate in a first area over the channel. The gate may be configured to include a lateral overhang that is separated from an upper surface of the first dielectric layer.


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