The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2020

Filed:

Dec. 16, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chi-Cherng Jeng, Tainan, TW;

Shyh-Wei Cheng, Zhudong Township, Hsinchu County, TW;

Yun Chang, Hsinchu, TW;

Chen-Chieh Chiang, Kaohsiung, TW;

Jung-Chi Jeng, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 21/50 (2013.01); H01L 21/762 (2013.01); H01L 21/76811 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 23/5384 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01);
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a first mask layer over a dielectric layer. The method includes forming a second mask layer over a first top surface of the first mask layer, the inner wall, and the bottom surface. The method includes removing the second mask layer covering the bottom surface to form a second trench in the second mask layer. The method includes forming an anti-bombardment layer over a second top surface of the second mask layer. The second mask layer and the anti-bombardment layer are made of different materials. The method includes removing the first portion, the first mask layer, the second mask layer, and the anti-bombardment layer to form a third trench in the dielectric layer. The method includes forming a conductive structure in the third trench.


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