The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2020
Filed:
Sep. 23, 2016
International Business Machines Corporation, Armonk, NY (US);
Globalfoundries, Inc., Grand Cayman, KY;
Stmicroelectronics, Inc., Coppell, TX (US);
Xiuyu Cai, Niskayuna, NY (US);
Qing Liu, Watervliet, NY (US);
Ruilong Xie, Schenectady, NY (US);
Chun-Chen Yeh, Clifton Park, NY (US);
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
STMICROELECTRONICS, INC., Coppell, TX (US);
GLOBALFOUNDRIES, INC, , KY;
Abstract
A large area electrical contact for use in integrated circuits features a non-planar, sloped bottom profile. The sloped bottom profile provides a larger electrical contact area, thus reducing the contact resistance, while maintaining a small contact footprint. The sloped bottom profile can be formed by recessing an underlying layer, wherein the bottom profile can be crafted to have a V-shape, U-shape, crescent shape, or other profile shape that includes at least a substantially sloped portion in the vertical direction. In one embodiment, the underlying layer is an epitaxial fin of a FinFET. A method of fabricating the low-resistance electrical contact employs a thin etch stop liner for use as a hard mask. The etch stop liner, e.g., HfO, prevents erosion of an adjacent gate structure during the formation of the contact.