The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2020

Filed:

Sep. 10, 2018
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, Hubei, CN;

Inventors:

Cheng Zhou, Hubei, CN;

Bin Yuan, Hubei, CN;

QingBo Liu, Hubei, CN;

Song Man Xu, Hubei, CN;

Siying Liu, Hubei, CN;

Rui Gong, Hubei, CN;

Zhiguo Zhao, Hubei, CN;

Zhaoyun Tang, Hubei, CN;

Zhiliang Xia, Hubei, CN;

Zongliang Huo, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 27/11524 (2017.01); H01L 27/11548 (2017.01); H01L 23/532 (2006.01); H01L 29/417 (2006.01); H01L 21/28 (2006.01); H01L 27/11531 (2017.01); H01L 27/11582 (2017.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 21/28008 (2013.01); H01L 23/53295 (2013.01); H01L 27/11524 (2013.01); H01L 27/11531 (2013.01); H01L 27/11548 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 29/41741 (2013.01); H01L 29/41725 (2013.01);
Abstract

A method for forming a 3D memory device is disclosed. The method includes: forming an first insulating layer on a substrate in a peripheral region, the first insulating layer having a slope near a boundary between the peripheral region and a core region of the substrate; forming an alternating conductive/dielectric stack on the substrate and the slope of the first insulating layer, a lateral portion of the alternating conductive/dielectric stack extending along a top surface of the substrate in the core region, and an inclined portion of the alternating conductive/dielectric stack extending along the slope of the first insulating layer; and forming a plurality of contacts to electrically contact a plurality of conductive layers in the inclined portion of the alternating conductive/dielectric stack.


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