The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2020
Filed:
Nov. 03, 2017
Applicant:
Utac Headquarters Pte. Ltd., Singapore, SG;
Inventors:
Saravuth Sirinorakul, Bangkok, TH;
Suebphong Yenrudee, Bangkok, TH;
Assignee:
UTAC Headquarters PTE. LTD, Singapore, SG;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4825 (2013.01); H01L 21/481 (2013.01); H01L 21/486 (2013.01); H01L 21/4828 (2013.01); H01L 21/4842 (2013.01); H01L 21/4857 (2013.01); H01L 21/4867 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3114 (2013.01); H01L 23/4952 (2013.01); H01L 23/49503 (2013.01); H01L 23/49527 (2013.01); H01L 23/49534 (2013.01); H01L 23/49548 (2013.01); H01L 23/49558 (2013.01); H01L 23/49582 (2013.01); H01L 23/49586 (2013.01); H01L 23/49805 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 23/49524 (2013.01); H01L 23/49541 (2013.01); H01L 24/97 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/45164 (2013.01); H01L 2224/45565 (2013.01); H01L 2224/45572 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48235 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/00014 (2013.01);
Abstract
Embodiments of the present invention are directed to a method of manufacturing a semiconductor package with an internal routing circuit. The internal routing circuit is formed from multiple molding routing layers in a leadframe land grid array semiconductor package by using a laser to blast away un-designed conductive areas to create conductive paths on each molding compound layer of the semiconductor package.