The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Jul. 18, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jun Liao, Portland, OR (US);

Xiang Li, Portland, OR (US);

Yunhui Chu, Hillsboro, OR (US);

Jong-Ru Guo, Portland, OR (US);

James McCall, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/11 (2006.01); H03F 3/16 (2006.01); H03F 3/68 (2006.01); H05K 1/18 (2006.01); H03F 3/45 (2006.01); G09G 5/00 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0216 (2013.01); G09G 5/006 (2013.01); H03F 3/16 (2013.01); H03F 3/45071 (2013.01); H03F 3/68 (2013.01); H05K 1/111 (2013.01); H05K 1/141 (2013.01); H05K 1/181 (2013.01); H03F 2200/129 (2013.01); H03F 2200/72 (2013.01); H03F 2203/45116 (2013.01); H05K 2201/10128 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10734 (2013.01);
Abstract

Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.


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